AHDB7394

Description

AHDB7394 is world's leading WiFi HaLow™ Daughter Board Module

The AHDB7394 allows building long range, ultra-low power WiFi networks in sub 1 GHz license-exempt bands, utilizing compact form factor.
The AHDB7394 PHY rate up to 15 Mbps which better than LoRa 38.4 Kbps with the high-speed data rate, it enables connectivity for many IoT applications, including sensors, weather stations, industrial monitoring, medical patient monitoring, smart agriculture monitoring, surveillance camera, smart city.

Key Features

NEWRACOM NRC7394 HaLow chipset
Up to 15Mbps data rate
HaLow IPEX-1/U.FL antenna connector
SPI and UART support for host interface

Specifications

Chipset	NEWRACOM NRC7394
Frequency	915 MHz (US) 868 MHz (EU) 920 MHz (JP) 920 MHz (TW)
Modulation	OFDM with BPSK, QPSK, 16QAM, 64QAM
Date rate	Up to 15 Mbps (Max. Phy rate)
Channel bandwidth	1/2/4 MHz (US) 1 MHz (EU) 1/2/4 MHz (JP) 1/2/4 MHz (TW)
Antenna connector	HaLow IPEX-1/U.FL antenna connector
Host interface	SPI, UART
Form factor	Daughter Board Module
Dimensions	33.0(L) × 20.75(W) mm (non-Includes pin header)
Operating temperature	-40°C to +85°C (-40°F to 185°F)
Software & SDK	https://github.com/newracom

Order Information
AHDB7394-915 (US) AHDB7394-868 (EU) AHDB7394-920 (JP) AHDB7394-920 (TW)	902 MHz – 928 MHz 863 MHz – 868 MHz 920.5 – 927.5 MHz 920.5 – 924.5 MHz	26 MHz 5 MHz 7 MHz 4 MHz

Pin Definition - Pin Description

MODE (Input)

(GPIO control by Host)

NRC7394

mode

Interface

Pin 10,12

(UART)

Note

Low (Ground)

Standalone

mode

UART1

Default

(use AT-CMD)

High (3.3V)

Download

mode

UART0

(System Console)

UART0

(System Console)

Firmware

Upload

Host

mode

SPI

* VDD_3.3V = VBT33

Pin Definition - Pin Description (Host mode)

AHDB7394 (Host mode)
Pin No.	Definition	Pin No.	Definition
Pin 1	SPI_MOSI (I)	Pin 2	MODE(I) (Pull High)
Pin 3	SPI_CLK (I)	Pin 4	RESET_N (I) (Active Low)
Pin 5	SPI_CSN (I) (Active Low)	Pin 6	GPIO#10/WAKEUP
Pin 7	SPI_MISO (O)	Pin 8	GND
Pin 9	SPI_IRQ (O) (Active High)	Pin 10	UART0_TX (module side)
Pin 11	VDD_3.3V	Pin 12	UART0_RX (module side)

* VDD_3.3V = VBT33

Pin Definition - Pin DescriptionPin Definition - Pin Description (Standalone mode)

AHDB7394 (Standalone mode)
Pin No.	Definition	Pin No.	Definition
Pin 1	GP#6 (I/O)	Pin 2	MODE(I) (Pull Low)
Pin 3	GP#7 (I/O)	Pin 4	RESET_N (I) (Active Low)
Pin 5	GP#28 (I/O)	Pin 6	GPIO#10/WAKEUP
Pin 7	GP#29 (I/O)	Pin 8	GND
Pin 9	GP#30 (I/O)	Pin 10	UART1_TX (module side)
Pin 11	VDD_3.3V	Pin 12	UART1_RX (module side)

* VDD_3.3V = VBT33

RF Specifications

AHDB7394 TX Transmit Power / RX Receive Sensitivity
Data Rate	Modulation	BW=1M			BW=2M			BW=4M			BW=8M
Data Rate	Modulation	Tx (dBm) +/-2	Rx (dBm)	PHY rate (kbps)	Tx (dBm) +/-2	Rx (dBm)	PHY rate (kbps)	Tx (dBm) +/-2	Rx (dBm)	PHY rate (kbps)	Tx (dBm) +/-2	Rx (dBm)	PHY rate (kbps)
MCS0	BPSK	17	-100	300	17	-98	650	17	-95	1350	N/A	N/A	N/A
MCS1	QPSK	17	-99	600	17	-95	1300	17	N/A	2700	N/A	N/A	N/A
MCS2	QPSK	17	-97	900	17	-93	1950	17	N/A	4050	N/A	N/A	N/A
MCS3	16-QAM	17	-93	1200	17	-89	2600	17	N/A	5400	N/A	-N/A	-N/A
MCS4	16-QAM	16	-90	1800	16	-86	3900	16	-83	8100	N/A	-N/A	-N/A
MCS5	64-QAM	15	-86	2400	15	-82	5200	15	N/A	10800	N/A	N/A	N/A
MCS6	64-QAM	14	-84	2700	14	-80	5850	14	N/A	12150	N/A	N/A	N/A
MCS7	64-QAM	11	-82	3000	11	-79	6500	12	-76	13500	N/A	N/A	N/A

Note: The following transmit power levels are for IEEE compliance for 802.11ah.
They do not consider any backoffs needed for regional spectrum compliance
(e.g., FCC, CE, TELEC, NCC).
TX power in edge channels

Reference Design

AHDB7394 Host mode